Difference between revisions of "Getting started with TI Jacinto 7 Edge AI/Introduction/SoM Overview"
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==== Configuration ==== | ==== Configuration ==== | ||
− | The switches SW1, SW2 and SW3 are called configuration switches and | + | The switches SW1, SW2 and SW3 are called configuration switches and |
+ | |||
+ | <br> | ||
+ | <br> | ||
+ | {| class="wikitable" style="margin: auto; text-align:center; vertical-align:middle;" | ||
+ | !colspan="1"|Process | ||
+ | !colspan="3"|CPU Usage (%) | ||
+ | !colspan="3"|Memory Usage (%) | ||
+ | |- | ||
+ | !| | ||
+ | !|1280x720@30fps | ||
+ | !|1920x1080@20fps | ||
+ | !|3840x2160@15fps | ||
+ | !|1280x720@30fps | ||
+ | !|1920x1080@20fps | ||
+ | !|3840x2160@15fps | ||
+ | |- | ||
+ | |GstD | ||
+ | |9.325 | ||
+ | |11.7 | ||
+ | |14.35 | ||
+ | |1.0 | ||
+ | |1.3 | ||
+ | |2.6 | ||
+ | |- | ||
+ | |GScam | ||
+ | |7.1375 | ||
+ | |13.75 | ||
+ | |18.75 | ||
+ | |1.3 | ||
+ | |1.5 | ||
+ | |1.8 | ||
+ | |- | ||
+ | |Nvargus | ||
+ | |24.9125 | ||
+ | |15.55 | ||
+ | |12.5875 | ||
+ | |6.8 | ||
+ | |6.2 | ||
+ | |5.1 | ||
+ | |- | ||
+ | |ROS (roscore,rosmaster,rosout,roslaunch) | ||
+ | |2.0 | ||
+ | |2.0 | ||
+ | |2.0 | ||
+ | |4.4 | ||
+ | |4.3 | ||
+ | |4.3 | ||
+ | |- | ||
+ | !colspan="7"|Note: This values are average for a test time of 60 seconds, ignoring idle states. | ||
+ | |} |
Revision as of 13:25, 9 June 2021
SOM Overview
Jacinto 7 System On Module
Features
According to Texas Instruments website, Jacinto 7 SOM has the following features:
- TDA4VM/DRA829V (J721 E) processor
- Optimized power solution (PMIC)
- DRAM, LPDDR4‐3733, 4GByte total memory, support inline ECC
- Octal‐SPI NOR flash, 512Mb memory (8bit)
- HyperFlash + HyerRAM, 512Mb flash memory + 256Mb RAM
Also, it is important to mention that TDA4VM and DRA829V processors heterogeneous architecture includes:
- A mix of fixed and floating-point DSP cores
- Arm® Cortex®-A72 cores
- Matrix math acceleration for machine learning
- Integrated ISP and vision processing acceleration
- 2D and 3D GPU cores
- H.264 encode/H.265 decode acceleration
Board Distribution
For reference on where are located main components and their description, check the following image:
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Configuration
The switches SW1, SW2 and SW3 are called configuration switches and
Process | CPU Usage (%) | Memory Usage (%) | ||||
---|---|---|---|---|---|---|
1280x720@30fps | 1920x1080@20fps | 3840x2160@15fps | 1280x720@30fps | 1920x1080@20fps | 3840x2160@15fps | |
GstD | 9.325 | 11.7 | 14.35 | 1.0 | 1.3 | 2.6 |
GScam | 7.1375 | 13.75 | 18.75 | 1.3 | 1.5 | 1.8 |
Nvargus | 24.9125 | 15.55 | 12.5875 | 6.8 | 6.2 | 5.1 |
ROS (roscore,rosmaster,rosout,roslaunch) | 2.0 | 2.0 | 2.0 | 4.4 | 4.3 | 4.3 |
Note: This values are average for a test time of 60 seconds, ignoring idle states. |