V4L2 FPGA - Introduction - Sink

V4L2 FPGA
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Introduction
Overview Frame Grabber Sink Filtering Budget Estimator
Getting the Code
How to get the code Building and Installation Guide Running the demo
Examples
Convolutioner Pass Through Video Test Pattern Generator Xilinx OpenCV
GStreamer Pipelines
Filter Mode Frame Grabber
Supported Platforms
PicoEVB Zynq 7000 series Zynq MP-SoC series LiteFury
Contact Us

A sink is a device that can receive frames or a video stream from user space and encodes it in order to be transmitted. It can be to either a display or to another kind of device.

This device might also enable us to query the capabilities of the receiving device such as the desired format, number of bits per pixel, width, and height. It can also configure the output to receive one of the outputs being offered.

This project will implement a V4L2 sink which will send frames to a device connected through a PCI-e or AXI interface. This allows sending the image to a display connected in this interface or to an HW accelerated algorithm whose output will later be extracted by the frame grabber.

On the other hand, it is possible to connect custom hardware that can interact with the image. Some examples:

• Custom displays (custom standard)
• Tri-dimensional LED arrays
• Actuators

Topology

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