Difference between revisions of "IMX8/IMX6vsIMX8"
< IMX8
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! scope="row" | I-Cache/D-Cache | ! scope="row" | I-Cache/D-Cache | ||
− | | style="text-align: left" | 32 KB/32 KB L1, 1 MB L2 || style="text-align: left" | '''Arm Cortex-A53:'''<br><li>32 KB L1 Instruction Cache<br></li><li>32 KB L1 Data Cache<br></li><li>Support L1 cache RAMs protection with parity/ECC<br></li>'''Arm Cortex-M4:'''<br><li>16 KB L1 Instruction Cache<br></li><li>16 KB L1 Data Cache<br></li><li>256 KB tightly coupled memory (TCM)</li><br> | + | | style="text-align: left" | 32 KB/32 KB L1, 1 MB L2 || style="text-align: left" | <li>'''Arm Cortex-A53:'''<br><li>32 KB L1 Instruction Cache<br></li><li>32 KB L1 Data Cache<br></li><li>Support L1 cache RAMs protection with parity/ECC<br></li></li><li>'''Arm Cortex-M4:'''<br><li>16 KB L1 Instruction Cache<br></li><li>16 KB L1 Data Cache<br></li><li>256 KB tightly coupled memory (TCM)</li></li><br> |
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! scope="row" | External Memory Interface | ! scope="row" | External Memory Interface |
Revision as of 11:12, 8 November 2018
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Features | i.MX6 Quad / i.MX6 Dual | i.MX8M Dual / i.MX8M QuadLite / i.MX8M Quad |
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CPU | ||
Maximum CPU Frequency | ||
I-Cache/D-Cache | 32 KB/32 KB L1, 1 MB L2 | |
External Memory Interface | 2 x 32 LP-DDR2, 1-ch. x 64 DDR3/DDR3L | |
Display Interface | HDMI + PHY, 2 x parallel, 2 x LVDS, MIPI DSI | HDMI Display Interface: support HDCP 2.2 and HDCP 1.4 MIPI-DSI Display Interface: Audio: supporting I2S, AC97, TDM, and codec/DSP interfaces, three SAI with 2 Tx and 2 Rx channels Camera inputs: |
Hardware Video Acceleration | HD (1080 + 720)p30 video decode HD 1080p30 video encode |
4Kp60 HEVC/H.265 main, and main 10 decoder 4Kp60 VP9 decoder 4Kp30 AVC/H.264 decoder 1080p60 MPEG-2, MPEG-4p2, VC-1, VP8, RV9, AVS, MJPEG, H.263 decoder |
Hardware 2D/3D Graphics Acceleration | HDMI + PHY, 2 x parallel, 2 x LVDS, MIPI DSI | 1.5 GHz |