FPGA Image Signal Processor - Getting the Code - Building and Installation Guide
FPGA Image Signal Processor |
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Introduction |
FPGA ISP Accelerators/Modules |
Getting the Code |
Examples |
GStreamer Pipelines |
Tested Platforms |
Contact us |
Contents
Supported Platforms
Currently, we support the following host platforms:
- NVIDIA Jetson Xavier (AGX and NX)
- i.MX 8 based boards
The tested FPGAs:
- PicoEVB (Artix 7 XC7A50T)
- LiteFury (Artix 7 XC7A100T)
- Zynq Ultrascale+ ZCU106 Evaluation Board
- Zedboard
Required products
FPGA Image Signal Processor requires the V4L2-FPGA project to synthesize the IP Cores. Also, it is important to build customized image processing pipelines tailored for FPGA. Please, check the V4L2-FPGA information in V4L2_FPGA.
Building the FPGA Image Signal Processor project
The installation instructions require work on your target platform and in a host computer, named development computer.
The instructions will be highlighted:
Light Blue for a 'development computer' instruction
Light Green for a 'target platform' instruction
Installing V4L2-FPGA
V4L2-FPGA project is required to synthesize the bitstreams of the FPGA-ISP modules. Please, refer to the V4L2-FPGA installation guide to get it into your system.
Cloning the FPGA Image Signal Processor
Supposing that the V4L2-FPGA repository is located at $V4L2_FPGA_DIR
, please, clone the FPGA-ISP repository into $V4L2_FPGA_DIR/src/hdl/xilinx/
to add the project IP Cores to the RidgeRun's HLS Wrapper.
cd $V4L2_FPGA_DIR/src/hdl/xilinx/
git clone https://gitlab.com/RidgeRun/orders/${CUSTOMER_DIRECTORY}/fpga-isp.git fpga_isp
Where $CUSTOMER_DIRECTORY
is your customer name after purchasing FPGA-ISP.
Synthesizing FPGA-ISP Modules
You can synthesize each FPGA-ISP module similarly to V4L2-FPGA example accelerators. In the host machine and inside of the V4L2-FPGA repository, you can run the make command specifying: FPGA model, platform, accelerator, and module. Please, follow the example presented below.
# FPGA vendor PLATFORM=xilinx # Select the model of the FPGA with its complete code FPGA_MODEL=xc7a50tcsg325-2 # Choose the FPGA-ISP folder after cloning the project into your V4L2-FPGA repository ACCELERATOR=fpga_isp # Select the module from FPGA-ISP to synthesize ISP_MODULE=debayer cd $V4L2_FPGA_DIR make PLATFORM=$PLATFORM FPGA_MODEL=$FPGA_MODEL ACCELERATOR=$ACCELERATOR ISP_MODULE=$ISP_MODULE
There are default values for PLATFORM
, FPGA_MODEL
, ACCELERATOR
and ISP_MODULE
:
PLATFORM=xilinx FPGA_MODEL=xc7a50tcsg325-2 ACCELERATOR=example ISP_MODULE=awb
You can get options for the supported FPGA_MODEL
by executing make help
.
Also, it is possible to execute make
inside of the accelerator directory for compiling it. For instance, let's suppose that the desired accelerator is located in $V4L2_FPGA_DIR/src/hdl/xilinx/fpga_isp/awb
. To synthesize its bitstream, you can:
cd $V4L2_FPGA_DIR/src/hdl/xilinx/fpga_isp/awb make
This will assume the FPGA_MODEL as xc7a50tcsg325-2
and will synthesize that specific accelerator.
After running make
, the project will generate two folders inside the chosen module. You will find both; the RTL in $ISP_MODULE/hls_wrapper/
and the bitstream in $ISP_MODULE/hdl_wrapper/
. To flash the ISP module into the FPGA, please, follow the instructions described in V4L2-FPGA/Installing/FPGA firmware.
For customized pipelines based on FPGA-ISP modules, you can base your accelerator on the example accelerator provided by the V4L2-FPGA project. Please, check the information here.